Rolando Moraga Mora

Skilled engineering manager who builds and motivates high-performing engineering teams. With over 9 years of experience in signal integrity, working on cutting-edge technology projects. Committed to rapidly and efficiently completing projects by leveraging team-based frameworks to maximize available engineering talent. Possess strong experience in the design of high-speed interfaces such as DisplayPort, Embedded DisplayPort, HDMI, USB 3.0, Thunderbolt, and PCIe. Experienced at reviewing PCB layouts and packages to ensure optimal signal integrity. Passionate at harnessing and developing the technical potential of the team, fostering a culture of continuous improvement and innovation.

• IEEE Paper 2019: Evaluation of a Segmented Approach to Model PCB-Based Links of a PCIe Bu s: In this work, a segmented approach to model PCI Express buses on PCBs, in terms of S-parameters, is analyzed. The models are built with a 3D full-wave approach. The goal is to evaluate a traditional segmented approach considering only signal paths, against complete full-wave models with mixed reference planes. It will be shown that, for the studied topology, transmission can be estimated through the segmented approach with good accuracy below 20 GHz. However, differences are observed at higher frequencies. For the case of mixed reference planes, the segmented approach underestimates crosstalk levels.
• Winner at the “ Hardwarethon 2014 '' contest in Costa Rica (First Place): 48 continuous hours of developing a project with hardware project using “Internet of Things” and embedded systems. In this case, my project was related with the acquisition of data from sensors.
• First place at the ITCR's Business Ideas Fair 2015 : Design and implementation of technological project with its business model.